A New Analytical Thermal Model for Multilevel ULSI Interconnects Incorporating Via Effect

This paper presents a compact analytical model for estimating the temperature rise of multilevel ULSI interconnects incorporating via effect. For the first time, an analytical expression is derived for the via correction factor, η, which quantifies the effect of via separation on the effective thermal conductivity of ILD (inter-layer dielectrics), k ILD,effective, with k ILD,effective = k ILD/η, where 0<η<1. Both the temperature profile along the metal lines and average temperature rise of the lines can be easily obtained using this analytical model. The predicted temperature profiles are shown to be in excellent agreement with the 3-D finite element thermal simulation results. The model is then applied to estimate the temperature distribution in multi-level interconnects. Significant difference in temperature distribution and maximum temperature rise is observed between the realistic situation of heat dissipation with vias and the overly simplified case that ignores via effect. Introduction In advanced ULSI technology, a variety of low-k materials have been introduced to reduce the RC delay, dynamic power consumption and crosstalk noise. Poor thermal conductivity has been a major concern to cause substantial rise in interconnect temperature. The combination of increasing current density, more interconnect levels, and the introduction of low-k ILD’s leads to non-negligible interconnect Joule heating. Recent publications have addressed the issue of poor thermal conductivity of low-k dielectrics and their impact on interconnect reliability and performance [1]. However, the effect of vias, which have much higher thermal conductivity than the dielectrics, on the thermal characteristics of interconnects has not been addressed adequately. Consequently, the predicted temperature is much higher than the temperature in practical situation. Recently, we analyzed the thermal effects in interconnects using a distributed circuit simulation approach [2, 3]. In this work, an analytical model based on first principles is developed under steady state conditions and the influence of vias on the temperature profile is evaluated. By defining the via correction factor (η), the via effect can be incorporated into the effective thermal conductivity of ILD, k ILD,effective. The conventional thermal equations can, thus, be conveniently used by replacing nominal k ILD by k ILD,effective. It is shown that η is highly dependent on via separation. Additionally, a simple heat spreading factor, s, is developed to accommodate the fact that heat can dissipate through larger area than the nominal contact area. The solution of s is validated by 3-D finite element simulation (ANSYS) and shows excellent agreement. Analytical Model and Assumptions Consider a rectangular metal wire with thickness H, width w, length L, resistivity ρ and thermal conductivity kM, separated from the underlying layer by ILD of thickness tILD and thermal conductivity k ILD. With x-coordinate set to zero at the middle of the wire, the two ends, x=±L/2, of the wire are connected to the underlying layer through vias. The temperature at the ends of the wire is assumed the same as the underlying layer temperature, T0, thus T(±L/2)=T0. It is further assumed that heat only flows downwards toward silicon substrate which is usually attached to a heat sink. Under steady state conditions, with uniform root-meansquare current, jrms, flowing in the wire, the governing heat equation is M rms H k j L T T dx T d 2 2 0 2 2 ρ − = − − , (1) where healing length, 2 1 1             ≡ s k Ht k L